A Comprehensive Review of Deep Learning with Optimization-Based Task Scheduling and Computing Resource Allocation for VR Video Services in Advanced 6G Networks

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Khaldun Qudratullah

Abstract

The emergence of advanced 6G networks is expected to transform immersive applications such as Virtual Reality (VR) video services, which require ultra-low latency, high bandwidth, and efficient computational resource management. Traditional cloud computing architectures are often unable to satisfy the strict Quality of Experience (QoE) demands of VR applications due to communication delays and limited scalability. Consequently, edge computing integrated with deep learning and optimization techniques has become a promising approach for intelligent task scheduling and computing resource allocation in 6G-enabled environments. Deep learning models, particularly Deep Reinforcement Learning (DRL), have shown strong capability in solving dynamic decision-making problems related to computation offloading, adaptive scheduling, and resource management in edge computing systems. Optimization techniques such as convex optimization and Lyapunov-based methods further enhance system stability, latency reduction, and energy efficiency. Recent studies demonstrate that integrating DRL with Multi-Access Edge Computing (MEC) significantly improves scalability and balances latency-energy trade-offs for VR services. VR applications also introduce challenges including high data transmission rates, real-time rendering demands, and strict latency requirements. Research findings indicate that hybrid frameworks combining deep learning with optimization methods provide efficient solutions for minimizing latency, maximizing resource utilization, and improving overall VR service delivery performance in next-generation 6G networks.


 

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How to Cite
Qudratullah, K. (2025). A Comprehensive Review of Deep Learning with Optimization-Based Task Scheduling and Computing Resource Allocation for VR Video Services in Advanced 6G Networks. ITSI Transactions on Electrical and Electronics Engineering, 14(1), 169–174. https://doi.org/10.65521/itsi-teee.v14i1.2817
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