A Comprehensive Review of Deep Learning-Based Area Efficient 1024-Point Pipelined Radix-4 FFT Processor for Biomedical Applications

Abstract

Fast Fourier Transform (FFT) processors are fundamental components in biomedical signal processing applications such as electrocardiogram (ECG), electroencephalogram (EEG), and medical imaging systems. With the increasing demand for real-time processing, high throughput, and low power consumption, the design of area-efficient FFT processors has become a critical research area. Traditional FFT architectures, including radix-2 and radix-4 algorithms, provide efficient computation by reducing the complexity of Discrete Fourier Transform (DFT) operations from to . Recent advancements have focused on pipelined architectures and hardware-efficient designs to achieve high-speed performance with minimal silicon area. In particular, radix-4 pipelined FFT processors offer reduced multiplication complexity and improved throughput compared to radix-2 implementations. Furthermore, the integration of deep learning techniques has opened new avenues for optimizing FFT architectures by enabling adaptive processing, noise reduction, and intelligent resource management. This paper presents a comprehensive review of deep learning-based, area-efficient 1024-point pipelined radix-4 FFT processors for biomedical applications. The study analyses existing architectures, highlights recent advancements in hardware optimization and deep learning integration, and identifies key challenges and future research directions for efficient biomedical signal processing systems.