AI-Driven Task-Specific Hardware Optimization: Profiling Llama 3.2’s CPU Performance in Multi- Prompt Inference Workflows

Abstract

This research presents an in-depth hardware compatibility evaluation of Meta's Llama 3.2 model on ten varied tasks—from long-context summarization and code generation to multi-turn dialogue and structured output generation—to discern performance trends and computational bottlenecks. Outputs show that hardware requirements differ widely by task type: long-context processing (1,915 input tokens) maximizes memory bandwidth (34% utilization), whereas code generation (659 tokens) and creative storytelling (2,321 tokens) maximize Central Processing Unit (CPU) parallelism (355% utilization on 4 cores). Multi-turn dialog shows growing latency (45 → 58 seconds) and token output increase (115→846 tokens) due to the compounding overhead of context retention, highlighting inefficiency in recurrent attention mechanisms. Repetitive work (1,000 "A"s) shows excellent token throughput (373 tokens/47 seconds), in contrast with mathematical calculations (square root of 123,456,789 × π), which overwhelm CPUs out of proportion (382% utilization) with trivial outputs, indicating Large Language Models (LLM) weakness in numeric accuracy. Ordered outputs (JSON) and translation work further reveal formatting-centric CPU overhead (355–382%), with tax policy questions (1,110 input tokens) uncovering context-parsing latency (53 seconds to process 148 tokens), highlighting semantic extraction inefficiencies from high-density texts. These results develop LLM work in three fronts: (1) Hardware Optimization, promoting task-specific settings (code/math with multi-core CPUs, plenty of RAM for context-intensive processes); (2) Model Architecture, calling for enhanced context handling and arithmetic blocks; and (3) Deployment Strategy, emphasizing resource allocation in keeping with use case operationalization (e.g., memory over legal/text analysis versus clock speed over creative applications). By correlating task types with hardware profiles, this research offers a framework for LLM scalability optimization, inference cost reduction, and informing future research into energy-efficient designs. The research highlights the need for interdisciplinary collaboration between Artificial Intelligence (AI) researchers and systems engineers to close the gap between algorithmic innovation and hardware capabilities, enabling sustainable large-scale LLM adoption.