AI-Driven Hardware-Efficient CNN Architecture for MNIST Classification Using Approximate Computing

Abstract

Convolutional Neural Networks (CNNs) have become fundamental in image classification tasks such as MNIST digit recognition. However, their deployment in edge and embedded systems is constrained by high computational complexity and energy consumption due to intensive multiply-and-accumulate (MAC) operations. Artificial Intelligence (AI)-driven hardware optimization techniques, including approximate computing, have emerged as effective solutions to enhance hardware efficiency. Approximate multipliers and adders reduce computational overhead by exploiting the error tolerance of neural networks. Recent studies show that approximate multiplier designs can reduce power consumption by over 30% while maintaining acceptable accuracy in neural network applications. Similarly, error-reduced carry prediction adders minimize propagation delay and improve performance in CNN accelerators. Decoder-based architectures further optimize CNN computation by reducing redundant operations and improving data flow efficiency. Additionally, AI-assisted design approaches such as neural architecture search and learning-based approximate computing enable adaptive optimization of hardware resources. This review analyses recent trends in hardware-efficient CNN architectures using approximate arithmetic units for MNIST classification. It highlights key design strategies, comparative insights, and emerging challenges, including accuracy trade-offs, hardware complexity, and scalability issues. The study provides future research directions toward energy-efficient and high-performance CNN hardware systems.